Generating interface adjustment signals in a device-to-device interconnection system

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United States of America Patent

PATENT NO 8782578
SERIAL NO

13747419

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Abstract

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Described are a system and method to control interface timing and/or voltage operations of signals transmitted between devices. A processor may be coupled through one or more bus interfaces of a bus to one or more corresponding interface timing and/or voltage comparison circuits and corresponding interface timing and/or voltage adjustment circuits.

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Patent Owner(s)

  • RAMBUS INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Tell, Stephen G Chapel Hill, US 25 483

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