Pulse output circuit, shift register and display device
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United States of America Patent
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Jul 22, 2014
Issued Date -
N/A
app pub date -
Sep 6, 2012
filing date -
May 11, 2001
priority date (Note) -
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Abstract
A pulse is input to first and second TFTs to turn ON the first and second TFTs so that the potential of a node a rises. When the potential of the node a reaches (VDD−VthN), the node α enters a floating state. Accordingly, a third TFT then turns ON, and potential of an output node rises as a clock signal reaches the level H. On the other hand, potential of a gate electrode of the third TFT further rises due to an operation of capacitance as the potential of the output node rises, so that the potential of the output node would be higher than (VDD+VthN). Thus, the potential of the output node rises to VDD without voltage drop caused by a threshold of the third TFT.
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