Method for manufacturing 3D circuits from bare die or packaged IC chips by microdispensed interconnections
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United States of America Patent
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Jul 29, 2014
Grant Date -
Sep 29, 2011
app pub date -
Jun 10, 2011
filing date -
Jul 13, 2005
priority date (Note) -
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Abstract
A method for manufacturing an electronic circuit in three-dimensional space provides for interconnecting electronic components within the circuit by directly writing conducting lines. The method may include observing a direct writing tool of a direct write system using a vision system, determining proper placement of the direct writing tool at least partially based on the step of observing, and directly writing conducting lines in three dimensions using the proper placement. The direct writing may be on a surface or in free space. The method may include stacking a plurality of chips to provide a stack having a top surface and edges extending away from the top and interconnecting connections of the chips by directly writing conducting lines along one of the edges.
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