N well implants to separate blocks in a flash memory device
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United States of America Patent
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Aug 5, 2014
Grant Date -
Oct 3, 2013
app pub date -
May 23, 2013
filing date -
May 11, 2005
priority date (Note) -
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Abstract
A semiconductor memory device that has an isolated area formed from one conductivity and formed in part by a buried layer of a second conductivity that is implanted in a substrate. The walls of the isolated area are formed by implants that are formed from the second conductivity and extend down to the buried layer. The isolated region has implanted source lines and is further subdivided by overlay strips of the second conductivity that extend substantially down to the buried layer. Each isolation region can contain one or more blocks of memory cells.
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