Graphene and nanotube/nanowire transistor with a self-aligned gate structure on transparent substrates and method of making same
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United States of America Patent
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Aug 12, 2014
Grant Date -
Feb 13, 2014
app pub date -
Oct 21, 2013
filing date -
Nov 1, 2011
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Abstract
Transistor devices having a self-aligned gate structure on transparent substrates and techniques for fabrication thereof are provided. In one aspect, a method of fabricating a transistor device includes the following steps. A channel material is formed on a transparent substrate. Source and drain electrodes are formed in contact with the channel material. A dielectric layer is deposited on the channel material. A photoresist is deposited on the dielectric layer and developed using UV light exposure through the transparent substrate. A gate metal(s) is deposited on the exposed portions of the dielectric layer and the undeveloped portions of the photoresist. The undeveloped portions of the photoresist are removed along with portions of the gate metal over the source and drain regions to form a gate of the device on the dielectric layer over the channel material which is self-aligned to the source and drain electrodes.
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