Semiconductor package and stacked semiconductor package
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United States of America Patent
Stats
-
Aug 12, 2014
Grant Date -
Dec 5, 2013
app pub date -
May 13, 2013
filing date -
May 30, 2012
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A semiconductor package includes a printed wiring board and a semiconductor chip that has a first signal terminal and a second signal terminal and is mounted on the printed wiring board. The printed wiring board has a first land and a second land for solder joining, which are formed on a surface layer thereof. Further, the printed wiring board has a first wiring for electrically connecting the first signal terminal of the semiconductor chip and the first land, and a second wiring for electrically connecting the second signal terminal of the semiconductor chip and the second land. The second wiring is formed so that the wiring length thereof is larger than that of the first wiring. The second land is formed so that the surface area thereof is larger than that of the first land. This reduces difference in transmission line characteristics due to the difference in wiring length.
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