Semiconductor constructions and methods of forming patterns

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8815497
APP PUB NO 20130302981A1
SERIAL NO

13941747

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Abstract

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Some embodiments include methods of forming patterns. A semiconductor substrate is formed to comprise an electrically insulative material over a set of electrically conductive structures. An interconnect region is defined across the electrically conductive structures, and regions on opposing sides of the interconnect region are defined as secondary regions. A two-dimensional array of features is formed over the electrically insulative material. The two-dimensional array extends across the interconnect region and across the secondary regions. A pattern of the two-dimensional array is transferred through the electrically insulative material of the interconnect region to form contact openings that extend through the electrically insulative material and to the electrically conductive structures, and no portions of the two-dimensional array of the secondary regions is transferred into the electrically insulative material.

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Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
deVillers, Anton J Clifton, US 4 14
Gou, Lijing Boise, US 24 103
He, Yuan Boise, US 214 1808
Hyatt, Michael Boise, US 19 73
Jain, Kaveri Boise, US 32 174
Light, Scott L Boise, US 43 544
Millward, Dan Boise, US 39 461
Zhang, Zishu Fremont, US 16 69
Zhou, Jianming Boise, US 55 199

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