Variable response mode for synchronous data read

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United States of America Patent

PATENT NO 8816718
SERIAL NO

13038270

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Abstract

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In one embodiment, a programmable logic device includes a memory and an input/output (I/O) interface adapted to enter a variable response mode responsive to an assertion of a control signal. The I/O interface is operable in the variable response mode to respond to a read command from an external device by retrieving data from the memory and to shift dummy data to the external device until an internal data ready signal is asserted.

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Patent Owner(s)

  • LATTICE SEMICONDUCTOR CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Zheng Upper Macungie, US 383 10682
Han, Wei Beaverton, US 279 2471
Juenemann, Warren Cornelius, US 7 19

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