Parallelized counter tree walk for low overhead memory replay protection
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United States of America Patent
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Aug 26, 2014
Grant Date -
Apr 10, 2014
app pub date -
Oct 5, 2012
filing date -
Oct 5, 2012
priority date (Note) -
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Abstract
A processor includes a memory encryption engine that provides replay and confidentiality protections to a memory region. The memory encryption engine performs low-overhead parallelized tree walks along a counter tree structure. The memory encryption engine upon receiving an incoming read request for the protected memory region, performs a dependency check operation to identify dependency between the incoming read request and an in-process request and to remove the dependency when the in-process request is a read request that is not currently suspended.
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