In-system reconfigurable circuit for mapping data words of different lengths
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United States of America Patent
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Sep 2, 2014
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N/A
app pub date -
Apr 20, 2012
filing date -
Jun 30, 2009
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Abstract
A de-mapping circuit for de-mapping input words of a first length into output words of a second length different from the first length. In one embodiment, the circuit includes a word register of the first length and temporary registers of the second length. The word register successively stores each of the inputs words in response to cycles of a clock. The temporary registers temporarily store the output words. Multiplexers configured by address signals select bits from stored input words and store the selected bits into the temporary registers to form temporarily stored output words.
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