Process for preparing a bonding type semiconductor substrate

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United States of America Patent

PATENT NO 8829488
SERIAL NO

13595284

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Abstract

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Provided is a laminate containing a first compound semiconductor layer; and a second compound semiconductor layer integrally bonded to the first compound semiconductor layer via a bonding layer. A plane A is in the second compound semiconductor layer bonded to a surface where a plane B is in the first compound semiconductor layer, or a surface where a plane B is in the second compound semiconductor layer bonded to a surface where a plane A in the first compound semiconductor layer. The impurity concentration of the bonding layer is 2×1018 cm3 or more.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akaike, Yasuhiko Kawasaki, JP 39 642
Furukawa, Kazuyoshi Kawasaki, JP 62 899
Yoshitake, Shunji Kawasaki, JP 12 481

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