Emulating execution of an instruction for discovering virtual topology of a logical partitioned computer system
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United States of America Patent
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Sep 9, 2014
Grant Date -
Oct 6, 2011
app pub date -
Jun 15, 2011
filing date -
Jan 11, 2008
priority date (Note) -
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Abstract
In a logically partitioned host computer system comprising host processors (host CPUs), a facility and instruction for discovering topology of one or more guest processors (guest CPUs) of a guest configuration comprises a guest processor of the guest configuration fetching and executing a STORE SYSTEM INFORMATION instruction that obtains topology information of the computer configuration. The topology information comprising nesting information of processors of the configuration and the degree of dedication a host processor provides to a corresponding guest processor. The information is preferably stored in a single table in memory.
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