Thread de-emphasis instruction for multithreaded processor

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United States of America Patent

PATENT NO 8832702
APP PUB NO 20080282251A1
SERIAL NO

11746998

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Abstract

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A technique for scheduling execution of threads at a processor is disclosed. The technique includes executing a thread de-emphasis instruction of a thread that de-emphasizes the thread until the number of pending memory transactions, such as cache misses, associated with the thread are at or below a threshold. While the thread is de-emphasized, other threads at the processor that have a higher priority can be executed or assigned system resources. Accordingly, the likelihood of a stall in the processor is reduced.

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Patent Owner(s)

  • NXP USA, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bruce, Klas M Leander, US 7 117
Schuler, Sergio Austin, US 14 47
Smittle, Matt B Allen, US 5 104
Snyder, Michael D Austin, US 70 1253
Whisenhunt, Gary L Austin, US 22 484

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