Semiconductor device and method of forming high routing density BOL BONL and BONP interconnect sites on substrate
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United States of America Patent
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Sep 23, 2014
Grant Date -
Oct 13, 2011
app pub date -
Dec 6, 2010
filing date -
Mar 25, 2005
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Abstract
A semiconductor device has a semiconductor die with a plurality of bumps formed over contact pads on a surface of the semiconductor die. The bumps can have a fusible portion and non-fusible portion. A plurality of conductive traces is formed over a substrate with interconnect sites having a width greater than 20% and less than 80% of a width of a contact interface between the bumps and contact pads. The bumps are bonded to the interconnect sites so that the bumps cover a top surface and side surface of the interconnect sites. An encapsulant is deposited around the bumps between the semiconductor die and substrate. The conductive traces have a pitch as determined by minimum spacing between adjacent conductive traces that can be placed on the substrate and the width of the interconnect site provides a routing density equal to the pitch of the conductive traces.
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