Power management domino SRAM bit line discharge circuit
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United States of America Patent
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Sep 23, 2014
Grant Date -
Apr 3, 2014
app pub date -
Feb 26, 2013
filing date -
Sep 28, 2012
priority date (Note) -
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Abstract
A domino static random access memory (SRAM) having one or more SRAM memory cells connected with a local bit line is disclosed. The SRAM may include a global bit line, a first precharge device connected between a voltage supply and the local bit line, and a second precharge device connected between the voltage supply and the global bit line. In addition the SRAM may include a global bit line discharge logic connected with the global bit line and the local bit line. The global bit line discharge logic is adapted to draw the global bit line to a voltage below a precharge voltage and above a ground voltage during a read operation.
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