Mechanism for detecting a no-processor swap condition and modification of high speed bus calibration during boot
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United States of America Patent
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Sep 23, 2014
Grant Date -
Jun 23, 2011
app pub date -
Dec 21, 2009
filing date -
Dec 21, 2009
priority date (Note) -
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Abstract
Memory channel training parameters are function of electrical characteristics of memory devices, processor(s) and memory channel(s). Training steps can be skipped if the BIOS can determine that the memory devices, motherboard and processor have not changed since the last boot. Memory devices contain a serial number for tracking purposes and most motherboards contain a serial number. Many processors do not provide a mechanism by which the BIOS can track the processor. Described herein are techniques that allow the BIOS to track a processor and detect a swap without violating privacy/security requirements.
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