Nonvolatile semiconductor memory device using write pulses with different voltage gradients

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United States of America Patent

PATENT NO 8848447
SERIAL NO

13226826

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Abstract

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A nonvolatile semiconductor memory device in accordance with an embodiment includes: a memory cell array having electrically rewritable nonvolatile memory cells; and a control unit. The control unit performs control of repeating a write operation, a write verify operation, and a step-up operation, the write verify operation being an operation to verify whether data write is completed or not, and the step-up operation being an operation to raise the write pulse voltage if data write is not completed. The control unit, during the write operation, raises a first write pulse voltage with a first gradient, and then raises a second write pulse voltage with a second gradient, thereby executing the write operation, the first write pulse voltage including at least a write pulse voltage generated at first, the second write pulse voltage being generated after the first write pulse voltage, and the second gradient being larger than the first gradient.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Irieda, Shigefumi Yokohama, JP 20 167
Kouno, Daisuke Yokkaichi, JP 8 50
Nakai, Kenri Fujisawa, JP 16 73
Shiino, Yasuhiro Yokohama, JP 63 516
Takahashi, Eietsu Yokohama, JP 58 476

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