Eliminating spurious algebraic loops

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United States of America Patent

PATENT NO 8849641
SERIAL NO

13041900

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Abstract

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A system is configured to: identify a block of a model; represent the block as a group of sub blocks; and establish connections for the group of sub blocks. The block includes an input signal and two or more output signals. The group of sub blocks include a state block that provides a state, and two or more output blocks for receiving the state.

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Patent Owner(s)

  • THE MATHWORKS, INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Babaali, Mohamed Framingham, US 4 3

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