Semiconductor structure with passive element network and manufacturing method thereof

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8853819
APP PUB NO 20120175731A1
SERIAL NO

13338087

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention relates to a semiconductor structure having an integrated passive network and a method for making the same. The semiconductor structure includes a substrate which can be an interposer. The substrate can include a plurality of conductive vias. In various embodiments, the substrate includes a dielectric layer disposed thereon, the dielectric layer having an opening forming a straight hole allowing electrical connection between the passive network and the conductive via. The passive network includes a series of patterned dielectric and conductive layers, forming passive electronic components. In an embodiment, the passive device includes a common resistor coupled to a pair of inductors, each of the inductors coupled to a capacitor. In another embodiment, the passive device includes a resistor and an inductor electrically connected to each other, a bottom surface of the inductor coplanar with a bottom surface of the resistor.

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First Claim

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Patent Owner(s)

Patent OwnerAddressTotal Patents
ADVANCED SEMICONDUCTOR ENGINEERING, INC.KAOHSIUNG858

International Classification(s)

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  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chen, Chien-Hua Pingtung, TW 194 1534
Hsieh, Meng-Wei Tainan, TW 4 11
Lee, Teck-Chong Kaohsiung, TW 20 50
Shih, Hsu-Chiang Kaohsiung, TW 2 7

Cited Art Landscape

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* Cited By Examiner

Patent Citation Ranking

Forward Cite Landscape

Patent Info (Count) # Cites Year
 
STMICROELECTRONICS (CROLLES 2) SAS (1)
* 9117693 Passive integrated circuit 1 2011
* Cited By Examiner

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