Semiconductor integrated circuit having multilayer structure
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United States of America Patent
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Oct 14, 2014
Grant Date -
Jan 24, 2013
app pub date -
Oct 11, 2011
filing date -
Jul 21, 2011
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Abstract
A semiconductor integrated circuit includes a plurality of semiconductor chips stacked in a multi-layer structure; a correction circuit in each semiconductor chip configured to reflect a delay time corresponding to the position of the chip in the stack into an input signal to output to each semiconductor chip; and a plurality of through-chip vias formed vertically through each of the semiconductor chips and configured to transmit the input signal to the semiconductor chip.
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