Semiconductor storage system capable of suppressing peak current

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United States of America Patent

PATENT NO 8861298
APP PUB NO 20120163112A1
SERIAL NO

13229999

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Abstract

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According to one embodiment, in a semiconductor storage system, the power supply wiring is connected to a first semiconductor storage device, and second semiconductor storage device as a common connection, and supplies power to the first and second semiconductor storage devices. A voltage detection circuit is provided in each of the first and second semiconductor storage devices. Each of the voltage detection circuits detects a power supply voltage of the power supply wiring. A control circuit is provided in each of the first and second semiconductor storage devices. When lowering of the power supply voltage is detected by a corresponding voltage detection circuit, each of the control circuits does not shift the operation of the first or second semiconductor storage device to the next operation until the power supply voltage is restored.

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Patent Owner(s)

  • TOSHIBA MEMORY CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Shibata, Noboru Kawasaki, JP 304 4734

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