Image encoder and image processing system

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United States of America Patent

PATENT NO 8873876
APP PUB NO 20130077877A1
SERIAL NO

13337934

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Abstract

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According to one embodiment, an image encoder configured to write coded image data in a memory includes an encoding module, a write address determining module, and a memory controller. The encoding module divides original image data including a plurality of pixels into a plurality of block lines, divides each block line into a plurality of sub-block lines, encodes the original image data in each sub-block line, and generates a plurality of coded sub-block lines. The write address determining module determines a write address of the memory in each coded sub-block line based on a number of the sub-block lines, an original image data size of the original image data, and image coding rate. The memory controller writes the coded sub-block line in the write address corresponding to the coded sub-block line.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Uchiyama, Masato Kawasaki, JP 13 72

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