Nonvolatile semiconductor memory device including plural memory cells and a dummy cell coupled to an end of a memory cell
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United States of America Patent
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Nov 4, 2014
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app pub date -
Jun 17, 2013
filing date -
Sep 30, 2002
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Abstract
A nonvolatile semiconductor memory device having a plurality of electrically rewritable nonvolatile memory cells connected in series together includes a select gate transistor connected in series to the serial combination of memory cells. A certain one of the memory cells which is located adjacent to the select gets transistor is for use as a dummy cell. This dummy cell is not used for data storage. During data erasing, the dummy cell is applied with the same bias voltage as that for the other memory cells.
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