System and method for stationary finite impulse response filters in programmable microelectronic circuits
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United States of America Patent
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Nov 11, 2014
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app pub date -
Apr 22, 2013
filing date -
Apr 22, 2013
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Abstract
A Field Programmable Gate Array (FPGA) to implement channel equalization to mitigate group velocity dispersion in an optical system. In one embodiment, a mapping is loaded into the FPGA whereby the in-phase and quadrature components of the baseband sequence to be filtered are routed to accumulators to form various sums, where each sum is multiplied by a corresponding distinct filter tap coefficient value according to the mapping to form various products, and where the products are summed to provide the in-phase and quadrature components of the filtered output.
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