Nanowire circuit architecture

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United States of America Patent

PATENT NO 8890117
SERIAL NO

12450372

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Abstract

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A nanowire circuit architecture is presented. The technology comprises of nanowire transistors (8,9), and optionally nanowire capacitors (12) and nanowire resistors (11), that are integrated using two levels of interconnects only (1,2). Implementations of ring-oscillators, sample-and-hold circuits, and comparators may be realized in this nanowire circuit architecture. Circuit input and circuit output as well as the transistor connections within each circuit are provided in the two levels of interconnects (1,2).

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Patent Owner(s)

Patent OwnerAddress
QUNANO ABLONGDE SWEDEN LUND SKANE

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wernersson, Lars-Erik Lund, SE 17 278

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