Clock gating latch, method of operation thereof and integrated circuit employing the same

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United States of America Patent

PATENT NO 8890573
SERIAL NO

13606582

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Abstract

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A clock gating latch, a method of gating a clock signal and an integrating circuit incorporating the clock gating latch or the method. In one embodiment, the clock gating latch includes: (1) a propagation circuit having a single, first switch configured to be driven by an input clock signal, (2) a keeper circuit coupled to the propagation circuit and having a single, first switch configured to be driven by the input clock signal and (3) an AND gate coupled to the propagation circuit and the keeper circuit and having an internal node coupled to a second switch in the propagation circuit and a second switch in the keeper circuit.

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Patent Owner(s)

  • NVIDIA CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Alben, Jonah San Jose, US 13 295
Elkin, Ilyas Sunnyvale, US 23 146
Yang, Ge Dublin, US 55 316

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