Systems and methods for power management in electronic devices

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United States of America Patent

PATENT NO 8892930
SERIAL NO

12184987

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Abstract

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Systems and methods are disclosed for managing power consumption in electronic devices. In certain embodiments, an integrated circuit for managing power consumption in an electronic device includes an input/output (I/O) interface, a first circuit block coupled to the I/O interface, and an interface circuit coupled between the I/O interface and the first circuit block, the interface circuit configured to provide a defined logic state to the first circuit block or a second circuit block external to the integrated circuit if one of the first circuit block or the second circuit block is powered down. By providing a defined logic state to the first circuit block or the second circuit block when one of the first circuit block or the second circuit block is powered down, power consumption of the electronic device may be reduced.

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Patent Owner(s)

  • INTEGRATED DEVICE TECHNOLOGY, INC.

International Classification(s)

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Wong, Tak Kwong Milpitas, US 12 157
Yeh, Tzong-Kwang Henry Palo Alto, US 10 91

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