Power budgeting between a processing core, a graphics core, and a bus on an integrated circuit when a limit is reached
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United States of America Patent
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Nov 25, 2014
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app pub date -
Feb 16, 2012
filing date -
Dec 15, 2011
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Abstract
An apparatus, method and system is described herein for efficiently balancing performance and power between processing elements based on measured workloads. If a workload of a processing element indicates that it is a bottleneck, then its performance may be increased. However, if a platform or integrated circuit including the processing element is already operating at a power or thermal limit, the increase in performance is counterbalanced by a reduction or cap in another processing elements performance to maintain compliance with the power or thermal limit. As a result, bottlenecks are identified and alleviated by balancing power allocation, even when multiple processing elements are operating at a power or thermal limit.
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