Logic circuit design method, logic circuit design program, and logic circuit design system

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United States of America Patent

PATENT NO 8898601
SERIAL NO

13947302

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Abstract

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According to one embodiment, a logic circuit design method of an embodiment includes generating logical data corresponding to register transfer level description, based on design data containing the register transfer level description, and generating constraint conditions designating circuit data which satisfies a predetermined condition among plural gate level circuit data logically equivalent to the logical data, based on the design data, and generating gate level circuit data based on the logical data under the constraint conditions.

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Patent Owner(s)

  • KABUSHIKI KAISHA TOSHIBA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Miyake, Masahisa Tokyo, JP 2 1
Nomura, Kazumasa Tokyo, JP 10 145
Yoshida, Kenji Kanagawa-ken, JP 372 3877

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