Chip positioning in multi-chip package
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United States of America Patent
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Dec 2, 2014
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app pub date -
Dec 21, 2012
filing date -
Dec 21, 2012
priority date (Note) -
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Abstract
Embodiments of the present invention include a substrate package, a method for multi-chip packaging, and a multi-chip package. For example, the substrate package includes a first set of reference markers and a second set of reference markers. The first set of reference markers is disposed on the substrate package, where the first set of reference markers is configured to provide a first alignment for positioning a first integrated circuit (IC) and a second alignment for positioning a second IC on the substrate package. Further, the second set of reference markers is disposed at a different location on the substrate package than the first set of reference markers, where the second set of reference markers is configured to provide confirmation of the first alignment and the second alignment.
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