Nonvolatile semiconductor memory device
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United States of America Patent
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Dec 9, 2014
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app pub date -
Feb 20, 2013
filing date -
Aug 24, 2012
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Abstract
This nonvolatile semiconductor memory device comprises a memory cell array configured having a plurality of memory mats arranged therein, each of the memory mats having a memory cell disposed therein at an intersection of a first line and a second line, the memory cell including a first variable resistance element. A third line extends through a plurality of the memory mats. A second variable resistance element is connected between the third line and the second line of each of the plurality of memory mats.
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