Systems and methods for improving performance in an HFC architecture
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United States of America Patent
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Dec 9, 2014
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app pub date -
Oct 19, 2011
filing date -
Oct 19, 2010
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Abstract
Systems and methods for improving performance in an HFC architecture are provided. Incoming data associated with a plurality of signals to be included in a downstream data signal may be received, and the incoming data may be mapped to a plurality of symbols representative of the signals. Data bits for each symbol may be mapped to at least one data register. The contents of the at least one register may be read by one or more digital-to-analog converters to facilitate a direct radio frequency synthesis, and the output of the one or more digital-to-analog converters may be provided to one or more electro-optic conversion devices configured to output a downstream data signal.
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