Method of designing a high performance application specific integrated circuit accelerator
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United States of America Patent
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Dec 9, 2014
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Dec 28, 2009
filing date -
Dec 29, 2008
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Abstract
A method is for designing an accelerator for digital signal processing including defining a software programmable fully pre-laid out macro by pre-laying out with a fixed topology a control logic of the DSP accelerator to obtain a fully pre-laid out control logic. The method further includes defining a hardware programmable partially pre-laid out macro by customizing a configurable layout area, thereby mapping a computational logic based on computation kernels related to an application of the DSP accelerator. A partially pre-laid out computational logic is therefore obtained.
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