Correlation of device manufacturing defect data with device electrical test data

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United States of America Patent

PATENT NO 8918753
APP PUB NO 20140115551A1
SERIAL NO

14025712

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Abstract

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Various embodiments related to correlating a location of a defect on a substrate for a semiconductor device to an electrical significance of a device structure at that location are disclosed. For example, one embodiment includes receiving a defect location for the location on the substrate where the defect was detected; receiving a physical representation of the semiconductor device for the defect location; generating a significance determination indicating whether the defect is located in an electrically significant region by correlating the defect location to logical and physical layout information included in the physical representation; and displaying the significance determination.

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Patent Owner(s)

  • TESEDA CORPORATION

International Classification(s)

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Akar, Armagan Portland, US 5 72
Sanchez, Ralph Portland, US 6 99

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