Conductive via hole and method for forming conductive via hole
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United States of America Patent
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Jan 6, 2015
Grant Date -
Jun 23, 2011
app pub date -
Dec 15, 2010
filing date -
Dec 18, 2009
priority date (Note) -
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status (Latency Note)
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Abstract
Provided is a technology for forming a conductive via hole to implement a three dimensional stacked structure of an integrated circuit. A method for forming a conductive via hole according to an embodiment of the present invention comprises: filling inside of a via hole structure that is formed in one or more of an upper portion and a lower portion of a substrate with silver by using a reduction and precipitation of silver in order to connect a plurality of stacked substrates by a conductor; filling a portion that is not filled with silver inside of the via hole structure by flowing silver thereinto; and sublimating residual material of silver oxide series, which is generated during the flowing, on an upper layer inside of the via hole structure filled with silver.
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