Programmable delay generator and cascaded interpolator
Number of patents in Portfolio can not be more than 2000
United States of America Patent
Stats
-
Jan 6, 2015
Issued Date -
N/A
app pub date -
Sep 4, 2013
filing date -
Jun 10, 2011
priority date (Note) -
In Force
status (Latency Note)
Importance
Abstract
A programmable delay generator and a cascaded interpolator are provided. The cascaded interpolator includes a set of interpolator stages, each having two signal inputs and two signal outputs, configured to receive two input signals having two different phases and to generate two output signals that have a phase separation equal to a fraction of a phase separation of the two input signals; and a phase converter connected to a last stage of the plurality of single-bit interpolator stages, configured to convert the two output signals into a single final output signal of a given phase.
First Claim
Family
International Classification(s)
Cited Art Landscape
Patent Citation Ranking
Advertisement
Advertisement
Advertisement
Recipient Email Address
Recipient Email Address
Comment
Recipient Email Address
Add to Portfolio(s)
To add this patent to one, or more, of your portfolios, simply click the add button.
This Patent is in these Portfolios:
Add to additional portfolios:
Last Refreshed On:
Changes done successfully