Adaptively time-multiplexing memory references from multiple processor cores
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United States of America Patent
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Jan 13, 2015
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app pub date -
Nov 10, 2010
filing date -
Jan 19, 2010
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Abstract
The disclosed embodiments relate to a system for processing memory references received from multiple processor cores. During operation, the system monitors the memory references to determine whether memory references from different processor cores are interfering with each other as the memory references are processed by a memory system. If memory references from different processor cores are interfering with each other, the system time-multiplexes the processing of memory references between processor cores, so that a block of consecutive memory references from a given processor core is processed by the memory system before memory references from other processor cores are processed.
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