Partial response equalizer and related method
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United States of America Patent
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Jan 27, 2015
Grant Date -
Oct 13, 2011
app pub date -
Mar 25, 2011
filing date -
Apr 8, 2010
priority date (Note) -
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Abstract
A multi-phase partial response receiver supports various incoming data rates by sampling PrDFE output values at a selected one of at least two clock phases. The receiver includes a calibration circuit that performs a timing analysis of critical data paths in the circuit, and this analysis is then used to select the particular clock phase used to latch the output values. These techniques permit the multiplexer outputs from for each phase of the partial response receiver to directly drive selection of a multiplexer for the ensuing phase, i.e., by avoiding regions of instability or uncertainty in the respective multiplexer outputs.
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