X-line routing for dense multi-chip-package interconnects
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United States of America Patent
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Feb 3, 2015
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app pub date -
Oct 31, 2012
filing date -
Oct 31, 2012
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Abstract
X-line routing arrangements for dense multi-chip-package interconnects are described. In an example, an electronic signal routing structure includes a substrate. A plurality of layers of conductive traces is disposed above the substrate. A first pair of ground traces is disposed in a first of the plurality of layers of conductive traces. A signal trace is disposed in a second of the plurality of layers of conductive traces, below the first layer. A second pair of ground traces is disposed in a third of the plurality of layers of conductive traces, below the first layer. The first and second pairs of ground traces and the signal trace provide an X-pattern routing from a cross-sectional perspective.
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