Nonvolatile semiconductor memory apparatus
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United States of America Patent
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Feb 3, 2015
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N/A
app pub date -
Jun 7, 2013
filing date -
Oct 9, 2012
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Abstract
According to one embodiment, a nonvolatile semiconductor memory apparatus includes a memory cell array, a row decoder, a controller. The memory cell array includes a plurality of memory strings. The memory strings include a first select transistor and a second select transistor, and are connected to each of a plurality of bit lines. The row decoder applies a voltage to the first and second select transistors. The controller detects a defect of the bit lines based on data read from the memory cells.
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