On-die termination of address and command signals

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United States of America Patent

PATENT NO 8947962
SERIAL NO

14088277

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Abstract

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A memory controller is disclosed. The memory controller is configured to be connected to one or more memory devices via an address and control (RQ) bus. Each of the memory devices have on-die termination (ODT) circuitry connected to a subset of signal lines of the RQ bus, and the memory controller is operable to selectively disable the ODT circuitry in at least one memory device of the one or more memory devices.

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Patent Owner(s)

  • RAMBUS INC.

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Oh, Kyung Suk Cupertino, US 116 1010
Shaeffer, Ian Los Gatos, US 145 1719

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