Dynamic priority control based on latency tolerance

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United States of America Patent

PATENT NO 8959266
APP PUB NO 20150039790A1
SERIAL NO

13957843

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Abstract

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A dynamic priority controller monitors a level of data in a display engine buffer and compares the level of data in the display engine buffer to a plurality of thresholds including a first threshold and a second threshold. When the level of data in the display engine buffer is less than or equal to the first threshold, the dynamic priority controller increases a priority for processing display engine data in a communication channel. When the level of data in the display engine buffer is greater than or equal to the second threshold, the dynamic priority controller decreases the priority for processing the display engine data in the communication channel.

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Patent Owner(s)

  • INTEL CORPORATION

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bonen, Nadav Ofer, IL 26 286
Greenfield, Zvika Kfar Sava, IL 36 1203
Levy, Tomer Tel Aviv, IL 26 400
Nori, Anant V Bangalore, IN 10 92
Shifer, Eran Tel Aliv, IL 14 134
Witter, Todd M Orangevale, US 19 155

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