On-chip slow-wave through-silicon via coplanar waveguide structures, method of manufacture and design structure
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United States of America Patent
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Feb 24, 2015
Grant Date -
Dec 13, 2012
app pub date -
Jun 9, 2011
filing date -
Jun 9, 2011
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Abstract
On-chip, high performance, slow-wave coplanar waveguide with through-silicon via structures, method of manufacture and design structures for integrated circuits are provided herein. The method includes forming at least one ground plane layer in a substrate and forming a signal layer in the substrate, in a same plane layer as the at least one ground. The method further includes forming at least one metal filled through-silicon via between the at least one ground plane layer and the signal layer.
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