Semiconductor memory device
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United States of America Patent
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Mar 3, 2015
Grant Date -
Jun 5, 2014
app pub date -
Feb 6, 2014
filing date -
Sep 7, 2011
priority date (Note) -
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Abstract
According to one embodiment, a semiconductor memory device includes memory cells, word lines, a driver circuit, and a control circuit. The memory cells are stacked above a semiconductor substrate, and each includes a charge accumulation layer and control gate. The word lines are coupled to the control gates. The driver circuit repeats a programming operation to write data in a memory cell coupled to a selected word line. In the programming operation, a first voltage is applied to the selected word line, a second voltage to a first unselected word line, and a third voltage to a second unselected word line. The control circuit steps up the first voltage and steps down the second voltage in repeating the programming.
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