Semiconductor wafer and method of forming sacrificial bump pad for wafer probing during wafer sort test
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United States of America Patent
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Mar 24, 2015
Grant Date -
Nov 26, 2009
app pub date -
May 15, 2009
filing date -
May 21, 2008
priority date (Note) -
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Abstract
A semiconductor wafer contains a plurality of semiconductor die. A plurality of interconnect bump pads is formed over the semiconductor die. A plurality of sacrificial bump pads is formed in proximity to and diagonally offset with respect to the interconnect bump pads. The sacrificial bump pads have a different diameter than the interconnect bump pads. A conductive link is formed between each interconnect bump pad and proximate sacrificial bump pad. The sacrificial bump pads, interconnect bump pads, and conductive link are formed concurrently or during bump formation. The wafer is electrically tested by contacting the sacrificial bump pads. The electrical test identifies known good die and defective die. The sacrificial bump pads and a portion of the conductive link are removed after wafer probing. Bumps are formed over the interconnect bump pads. The semiconductor wafer can be sold or transferred to a third party after wafer probing without bumps.
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