Method for using nanoparticles to make uniform discrete floating gate layer

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United States of America Patent

PATENT NO 8987802
APP PUB NO 20140239365A1
SERIAL NO

13781066

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Abstract

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A memory cell including a control gate located over a floating gate region. The floating gate region includes discrete doped semiconducting or conducting regions separated by an insulator and the discrete doped semiconducting or conducting regions have a generally cylindrical shape or a quasi-cylindrical shape.

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Patent Owner(s)

  • SANDISK TECHNOLOGIES LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kai, James Fremont, US 122 3641
Lee, Donovan Santa Clara, US 18 438
Matamis, George Danville, US 116 3254
Purayath, Vinod Santa Clara, US 24 326
Radigan, Steven J Fremont, US 39 676

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