Copper pillar full metal via electrical circuit structure

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United States of America Patent

PATENT NO 8987886
SERIAL NO

13413724

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Abstract

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An electrical interconnect including a first circuitry layer with a first surface and a second surface. At least a first dielectric layer is printed on the first surface of the first circuitry layer to include a plurality of first recesses. A conductive material is deposited in a plurality of the first recesses to form a plurality of first conductive pillars electrically coupled to, and extending generally perpendicular to, the first circuitry layer. At least a second dielectric layer is printed on the first dielectric layer to include a plurality of second recesses generally aligned with a plurality of the first conductive pillars. A conductive material is deposited in a plurality of the second recesses to form a plurality of second conductive pillars electrically coupled to, and extending parallel the first conductive pillars.

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Patent Owner(s)

  • HSIO TECHNOLOGIES, LLC

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Rathburn, James Mound, US 48 2930

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