Biasing scheme for large format CMOS active pixel sensors

Number of patents in Portfolio can not be more than 2000

United States of America Patent

PATENT NO 8988568
APP PUB NO 20090002536A1
SERIAL NO

12216430

Stats

ATTORNEY / AGENT: (SPONSORED)

Importance

Loading Importance Indicators... loading....

Abstract

See full text

An image sensor includes circuitry compensating for voltage drops in a VSS line. The image sensor includes a plurality of photoreceptors arranged in a pixel array having a number of column lines, and read-out circuitry on the column lines. The read-out circuitry provides substantially equal currents on each column line so as to compensate for voltage drops in the VSS line and provide more accurate pixel signals. The image sensor also includes circuitry for filtering noise from a voltage supply line, and for providing hard and/or soft reset operations.

Loading the Abstract Image... loading....

First Claim

See full text

Family

Loading Family data... loading....

Patent Owner(s)

  • MICRON TECHNOLOGY, INC.

International Classification(s)

  • [Classification Symbol]
  • [Patents Count]

Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Nakamura, Junichi Tokyo, JP 294 5123
Takayanagi, Isao Tokyo, JP 44 419

Cited Art Landscape

Load Citation

Patent Citation Ranking

Forward Cite Landscape

Load Citation

Maintenance Fees

Fee Large entity fee small entity fee micro entity fee due date
11.5 Year Payment $7400.00 $3700.00 $1850.00 Sep 24, 2026
Fee Large entity fee small entity fee micro entity fee
Surcharge - 11.5 year - Late payment within 6 months $160.00 $80.00 $40.00
Surcharge after expiration - Late payment is unavoidable $700.00 $350.00 $175.00
Surcharge after expiration - Late payment is unintentional $1,640.00 $820.00 $410.00