Semiconductor device and method of forming recesses in substrate for same size or different sized die with vertical integration
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United States of America Patent
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Mar 31, 2015
Grant Date -
Jun 14, 2012
app pub date -
Dec 9, 2010
filing date -
Dec 9, 2010
priority date (Note) -
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Abstract
A semiconductor device has a substrate with a first and second recess formed in a surface of the substrate using a wet etch process. The second recess can have a size different from a size of the first recess. A plurality of conductive vias are formed in a surface of the first and second recesses using a dry etch process. A first conductive layer is formed over the surface of the substrate, over curved side walls of the first and second recesses, and electrically connected to the plurality of conductive vias. A first and second semiconductor die are mounted into the first and second recesses respectively. The second semiconductor die can have a size different from a size of the first semiconductor die. The first and second semiconductor die are electrically connected to the first conductive layer. An interconnect structure is electrically connected to the plurality of conductive vias.
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