Semiconductor device and structure

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United States of America Patent

PATENT NO 8994404
SERIAL NO

13796930

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Abstract

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A 3D device, including: a first layer including first transistors, the first transistors interconnected by a first layer of interconnection; a second layer including second transistors, the second transistors overlaying the first layer of interconnection; the first layer includes a first clock distribution structure, the first clock distribution structure includes a first clock origin, the second layer includes a second clock distribution structure, the second clock distribution structure includes a second clock origin, and the second clock origin is feeding the first clock origin.

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Patent Owner(s)

Patent OwnerAddress
SAMSUNG ELECTRONICS CO LTD129 SAMSUNG-RO YEONGTONG-GU SUWON-SI GYEONGGI-DO 16677

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Or-Bach, Zvi San Jose, US 534 17764
Wurman, Zeev Palo Alto, US 43 557

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